1. Field of the Invention
The present invention relates to a bonding method for a three-dimensional integrated circuit and the three-dimensional integrated circuit, in particular to the bonding method for a three-dimensional integrated circuit capable of forming an adhesive layer, a barrier layer and a boundary protection layer automatically as well as the three-dimensional integrated circuit thereof.
2. Description of the Related Art
As science and semiconductor technology advance, technical products tend to be developed with a compact, thin, light and multifunctional design. The containing spaces of these products tend to be reduced constantly and more challenging on the design of the integrated circuit (IC). Currently, the development of the present existing technology in stacking three-dimensional integrated circuits, the area of memories installed on a printed circuit board is reduced significantly to improve the efficiency of miniaturizing an electronic product and integrate different functional chips into the same package to enhance the performance and benefit of a system in package (SiP).
In a conventional bonding method of the integrated circuits as disclosed in U.S. Pat. No. 5,334,804, a method of using conductive copper pillars to connect an integrated circuit chip and a substrate, but this method involves a complicated manufacturing process and a high level of difficulties of the manufacture, and this method is more suitable for a back-end packaging process and cannot be applied in a front-end process. The “Effect of Annealing Ambient on the Self-Formation Mechanism of Diffusion Barrier Layers Used in Cu(Ti) Interconnects” as disclosed by S. TSUKIMOTO et. al in 2007 is applicable in copper conducting wires to inhibit the wires from being oxidized easily. However, this method is only applicable for bonding two-dimensional planes, and not applicable for extending the degree of freedom. Obviously, the development of this method is limited.
From the description above, the prior arts have the problems of having a complicated manufacturing process, failing to extend the degree of freedom, fitting in the traditional manufacturing method only, and limiting the development of science and technology. Therefore, it is an urgent issue for related manufacturers or designers to design a bonding method for a three-dimensional integrated circuit and a three-dimensional integrated circuit thereof.